1. Field of the Invention
The invention relates in general to a flash memory and a method for determining logic states thereof, and more particularly to a flash memory capable of saving memory operating window and a method for determining logic states thereof.
2. Description of the Related Art
The technology of non-volatile memory has been widely applied in many fields including flash memory. The flash memory is used for the reading and writing of data. As the data stored in the flash memory are not maintained by power, the flash memory is widely applied in various types of data storage.
Referring to FIG. 1, a diagram of a conventional flash memory is shown. The flash memory 100 includes a number of memory cells M arranged in an array. Each of the memory cells M is enabled by a corresponding word line WL. When the flash memory 100 is read, programmed or erased, the bit line BL and the word line WL corresponding to the target memory cell M are enabled. A determination as to whether the bit line BL is electrically connected to the sense amplifier unit 102 or the ground is made by a select switch (not shown in the diagram).
After data are written into the flash memory 100, that is, after programming, the flash memory 100 needs to be verified to assure the accuracy of data writing. That is, whether the threshold voltage of the memory cell M is above the programming verification voltage is verified. If verification is applied to the memory cell M after programming, a verifying gate voltage is applied to the corresponding word line WL, and a drain voltage is applied to the drain of the memory cell M. At least one reference cell 103 is coupled to the sense amplifier 102 and the memory cells M, for outputting a reference current.
The sense amplifier 120 is for detecting the cell current of the memory cells M to ascertain whether the memory cells M succeeds in programming. The cell current detected by the sense amplifier unit 102 is smaller than the reference current implies that the threshold voltage of the memory cell M is larger than the threshold voltage of the reference cell, and the flash memory succeeds in programming. Thus, the threshold voltage of the reference cell is defined as programming verification voltage PV.
The threshold voltage of memory cells M refers to the threshold voltage of the memory cells M after manufacturing process, and is defined as the manufacturing process threshold voltage P_VT. The threshold voltage sensed by the sense amplifier 120 via the bit line BL is defined as the sensing threshold voltage S_VT. In the flash memory 100, the word line WL1 and the word line WLm are taken for example, however the example is non-limiting. The memory cells M corresponding to the word line WL1 have the same manufacturing process threshold voltage P_VT with the memory cells M corresponding to the word line WLm. However, as the bit lines BL are formed from a metal and buried diffusion region, the current sensing path of the sense amplifier unit 102 used for sensing the memory cells M corresponding to the word line WL1 has a relatively higher sensing parasitic resistance, while the current sensing path used for sensing the memory cells M corresponding to the word line WLm has a relatively lower sensing parasitic resistance. The effect caused by the sensing parasitic resistance is defined as array resistance effect (ARE).
Referring to FIG. 2, a partial architecture diagram of a conventional flash memory is shown. In the flash memory 100, memory cells M are divided into n groups, wherein n is a positive integer. Memory cells M of each group are connected electrically to the sense amplifier unit 102 via the corresponding group select switch 111˜11m. The current sensing path of the sense amplifier 102 used for sensing the memory cell B is longer with a higher sensing parasitic resistance Rmbl. The current sensing path of the sense amplifier 102 used for sensing the memory cell A is shorter with a lower sensing parasitic resistance.
Referring to FIG. 3, a distribution diagram of the threshold voltage of memory cells in the wake of conventional programming verification is shown. Suppose the distribution of the process threshold voltage (S_VT) of the memory cells M corresponding to the word line WLm is the same as the distribution of the process threshold voltage (S_VT) of the memory cells M corresponding to the word line WL1. Distribution curve 302 shows the distribution of the sensing threshold voltage and process threshold voltage of the memory cells M corresponding to the word line WLm and sensed by the sense amplifier unit 102 prior to programming. Distribution curve 304 shows the distribution of the sensing threshold voltage of the memory cells M corresponding to the word line WL1 and sensed by the sense amplifier unit 102 prior to programming. Due to the influence of the sensing parasitic resistance, that is, the array resistance effect, the sensing threshold voltage distribution curve 304 more affected by the array resistance effect is more shifted to the right than the sensing threshold voltage distribution curve 302 is. Distribution curve 306 detected by sense amplifier is a combined distribution curve of the sensing threshold voltage distribution curve 302 and the sensing threshold voltage distribution curve 304. As the sensing threshold voltage distribution curve 302 is least affected by the sensing parasitic resistance, the sensing threshold voltage distribution curve 302 can be regarded as wider than the initial manufacturing process threshold voltage distribution P_VT.
During the programming verification, the sensing threshold voltage distribution of the memory cells M corresponding to the word line WL1 and the word line WLm and sensed by the sense amplifier unit 102 forms a distribution curve 308 which is above the programming verification voltage PV. It can be obtained from the sensing threshold voltage distribution curve 308 that the sensing threshold voltage distribution of the memory cells M corresponding to the word line WLm after programming forms a distribution curve 310, and the sensing threshold voltage distribution of the memory cells M corresponding to the word line WL1 after programming forms a distribution curve 312.
The difference between the upper limit of the sensing threshold voltage distribution curve 306 and the lower limit of the sensing threshold voltage distribution curve 308 is defined as the memory operating window S1, which is the actual operating window of the flash memory 100. During the programming of flash memory 100, the operating window provided to the memory cells M corresponding to the word line WL1 is the difference between the upper limit of the sensing threshold voltage distribution curve 204 and the lower limit of the sensing threshold voltage distribution curve 208 according to its S_VT distribution, that is the memory operating window S1. The first process threshold voltage difference D1 is the upper limit of the process threshold voltage distribution curve 302 and the lower limit of the process threshold voltage distribution curve 312. Actually, the first process threshold voltage difference D1 is equal to the memory operating window S1, so there is no waste in programming delta threshold voltage. Despite the threshold voltage sensed by the sense amplifier unit 102 is shifted, the actual programming is not affected.
However, the operating window for the programming of the memory cells M corresponding to the word line WLm is the difference between the upper limit of the sensing threshold voltage distribution curve 302 and the lower limit of the sensing threshold voltage distribution curve 310, and is defined as the second process threshold voltage difference D2. The second process threshold voltage difference D2 is larger than the memory operating window S1. That is, the operating window provided to the memory cells M corresponding to the word line WLm is larger than the memory operating window S1, therefore a total of (D2−S1) operating window is wasted. Consequently, the memory cells M corresponding to the word line WLm will have more program charge, and the programming uniformity of the flash memory 100 will decrease.
Besides, after data are erased from the flash memory 100, an erasing verification is applied to the flash memory 100 to assure the accuracy of data erasing. That is, whether the threshold voltage of the memory cells M is below the erasing verification voltage is verified. Similarly, after data reading from the flash memory 100, a verification is also applied. Likewise, the operating window provided to the memory cells M corresponding to the word line WLm is larger than the memory operating window. Consequently, the memory cells M corresponding to the word line WLn will have more charge, and the uniformity of the flash memory 100 will decrease.